ECE 351 CMOS VLIS Laboratory

The lab provides an extensive opportunity to implement complementary metal oxide semiconductor (CMOS) very large-scale integration (VLSI) design concepts. Students will: Use CMOS techniques to design and predict the performance of NOT/NAND/AND/NOR/OR logic gates; design area and delay-constrained 8-bit equality comparator, adder, and multiplexer circuits; design transistors to drive large loads; design an 8-bit low power ALU circuit with PAD frames. Corequisite: ECE 353

Credits

1

Lab Hours

2

Lecture Hours

0

Corequisite

ECE 353